Objectives of Programme's Learning Outcomes

• Imagine, implement and operate systems/solutions/software to address a complex problem in the field of electrical engineering as a source of information by integrating needs, contexts and issues (technical, economic, societal, ethical and environmental).
• Based on modelling and experimentation, design one or more systems/solutions/software addressing the problem raised; evaluate them in light of various parameters of the specifications.
• Implement a chosen system/solution/software in the form of a drawing, a schema, a flowchart, an algorithm, a plan, a model, a prototype, software and/or digital model.
• Mobilise a structured set of scientific knowledge and skills and specialised techniques in order to carry out electrical engineering missions, using their expertise and adaptability.
• Master and appropriately mobilise knowledge, models, methods and techniques specific to electrical engineering.
• Assess the validity of models and results in view of the state of science and characteristics of the problem.
• Communicate and exchange information in a structured way - orally, graphically and in writing, in French and in one or more other languages - scientifically, culturally, technically and interpersonally, by adapting to the intended purpose and the relevant public.
• Argue to and persuade collaborators, clients, teachers and boards, both orally and in writing.
• Select and use the written and oral communication methods and materials adapted to the intended purpose and the relevant public.
• Use and produce high-quality scientific and technical papers (reports, plans, specifications, etc.), adapted particularly to the intended purpose and the relevant public.
• Learn to use a laboratory notebook to record the results of experiments and thereby initiate a protective approach to intellectual results.
• Master technical English in the field of electrical engineering.
• Adopt a professional and responsible approach, showing an open and critical mind in an independent professional development process.
• Analyse their personal functioning and adapt their professional attitudes.
• Exploit the different means available in order to inform and train independently.
• Contribute by researching the innovative solution of a problem in engineering sciences.
• Design and implement technical analysis, experimental studies and numerical modelling to address a given problem.
• Collect and analyse data rigorously.
• Adequately interpret results taking into account the reference framework within which the research was developed.
• Communicate, in writing and orally, on the approach and its results in highlighting both the scientific criteria of the research conducted and the theoretical and technical innovation potential, as well as possible non-technical issues.

Learning Outcomes of UE

To understand the internal behavior of CMOS digital circuits, being able to develop, test/simulate, optimize and implement in CMOS technology while applying the techniques presented during the theoretical course. Master industrial EDA development tools Cadence and Synopsys. Design in VHDL at the RTL (register transfer level), circuits and complex digital structures, simulate, optimize, and synthesize (RTL and logic) on a support based on reconfigurable FPGA devices. Master the industrial CAD development tools Altera / Xilinx.

Content of UE

This course is a free adaptation of the digital courses of circuits of professors Rabaey and Weste. The adaptation accounts of recent progress in the field of micro-electronics, stressed by the dominant influence of CMOS technology compared to the bipolar one. This course shows the development of the digital circuits from the base, from transistors and logical gates to the description of complex blocks (combinational and sequential circuits, adders, memories, multiplieurs). It includes the development of VLSI circuits, showing methodologies and tools necessary for the design and test of current digital circuits. Practical sessions are based on using the VHDL language at the RT (Register Transfert) level and FPGA-based design tool to come up with dedicated digital circuits. Laboratory sessions cover the design flow from basic gates design to memories and RTL components down to IC (Integrated Circuits) layout using Cadence and Mentor EDA tools.

Prior Experience

Physic Electronics. Logic circuits. Analog circuits.

Type of Assessment for UE in Q1

• Oral examination
• Practical test
• Quoted exercices

Q1 UE Assessment Comments

AA evaluation. AA I-SEMI-003 Digital Electronics (4601). Total 1st session (1st semester - January): 100%. Practical laboratory work 15%. Exercises exam (2h) 45%. Theoretical exam (oral - max. 8 students per group of 4 hours) 40%.

Type of Assessment for UE in Q3

• Oral examination
• Practical Test

Q3 UE Assessment Comments

AA evaluation. AA I-SEMI-003 Digital Electronics (4601). Total 2nd session 100%: Exercises exam (2h) 60%. Theoretical oral exam 40%.

Type of Resit Assessment for UE in Q1 (BAB1)

• N/A

Q1 UE Resit Assessment Comments (BAB1)

Not applicable