Study programme 2020-2021Français
Edge Computing
Programme component of Master's in Computer Engineering and Management à la Faculty of Engineering

Students are asked to consult the ECTS course descriptions for each learning activity (AA) to know what special Covid-19 assessment methods are possibly planned for the end of Q3

CodeTypeHead of UE Department’s
contact details
UI-M2-IRIGIG-565-MOptional UEVALDERRAMA SAKUYAMA Carlos AlbertoF109 - Electronique et Microélectronique

of instruction
of assessment
HT(*) HTPE(*) HTPS(*) HR(*) HD(*) CreditsWeighting Term
  • Anglais
Anglais60000055.002nd term

AA CodeTeaching Activity (AA) HT(*) HTPE(*) HTPS(*) HR(*) HD(*) Term Weighting
I-SEMI-114Edge Computing600000Q2100.00%
Programme component

Objectives of Programme's Learning Outcomes

  • Imagine, design, develop, and implement conceptual models and computer solutions to address complex problems including decision-making, optimisation, management and production as part of a business innovation approach by integrating changing needs, contexts and issues (technical, economic, societal, ethical and environmental).
    • Deliver a solution selected in the form of diagrams, graphs, prototypes, software and/or digital models.
    • Evaluate the approach and results for their adaptation (modularity, optimisation, quality, robustness, reliability, upgradeability, etc.).
  • Mobilise a structured set of scientific knowledge and skills and specialised techniques in order to carry out computer and management engineering missions, using their expertise and adaptability.
    • Master and appropriately mobilise knowledge, models, methods and techniques specific to computer management engineering.
    • Analyse and model an innovative IT solution or a business strategy by critically selecting theories and methodological approaches (modelling, optimisation, algorithms, calculations), and taking into account multidisciplinary aspects.
    • Identify and discuss possible applications of new and emerging technologies in the field of information technology and sciences and quantifying and qualifying business management.
  • Plan, manage and lead projects in view of their objectives, resources and constraints, ensuring the quality of activities and deliverables.
    • Respect deadlines and timescales
  • Work effectively in teams, develop leadership, and make decisions in multidisciplinary, multicultural and international contexts.
    • Interact effectively with others to carry out common projects in various contexts (multidisciplinary, multicultural, and international).
  • Communicate and exchange information in a structured way - orally, graphically and in writing, in French and in one or more other languages - scientifically, culturally, technically and interpersonally, by adapting to the intended purpose and the relevant public.
    • Argue to and persuade customers, teachers and boards, both orally and in writing.
    • Select and use the written and oral communication methods and materials adapted to the intended purpose and the relevant public.
    • Use and produce scientific and technical documents (reports, plans, specifications) adapted to the intended purpose and the relevant public.
  • Adopt a professional and responsible approach, showing an open and critical mind in an independent professional development process.
    • Exploit the different means available in order to inform and train independently.
  • Contribute by researching the innovative solution of a problem in engineering sciences.
    • Construct a theoretical or conceptual reference framework, formulate innovative solutions from the analysis of scientific literature, particularly in new or emerging disciplines.
    • Collect and analyse data rigorously.
    • Adequately interpret results taking into account the reference framework within which the research was developed.
    • Communicate, in writing and orally, on the approach and its results in highlighting both the scientific criteria of the research conducted and the theoretical and technical innovation potential, as well as possible non-technical issues.

Learning Outcomes of UE

EN. This teaching unit will be in English and broken down into two parts. In the first place, "Embedded Software using Python/SoC", embedded architectures, development tools and the development of applications using high level Python and C ++ languages will be developed, accompanied by application cases in the Domotic, IoT (Internet-of-Things) and Machine Learning domains. The second part, "Edge Computing High Level Synthesis", presents the tools for developing complete System-on-Chips, consisting of programmable and reconfigurable parts, development stages, architecture exploration and optimizations. Master the design of systems, concepts, methodologies and tools of development; from its specification at the system level, through the modeling of the problem, the exploration, analysis and optimization of feasible solutions, until obtaining a system that meets the economic and technical needs. Better understand the advantages and disadvantages of existing solutions, and implementation alternatives, according to a set of evaluation criteria (architecture, development costs, size, performance, energy consumption, etc.).). In a practical aspect, the student must deal with the implementation of a solution, partial or complete (including software, operating system, or development of IP components - intellectual Property - off-the-shelf -COTS) all using programmable and reconfigurable technologies and development tools commonly available in the industry.

Content of UE

Embedded Software using Python/SoC 
EN. The emergence of the Python Productivity for Zynq (PYNQ) development environment based on Jupyter notebooks solves FPGA programmability issues. With a development board specifically designed to support PYNQ, developers with little FPGA experience can quickly implement designs that can take full advantage of FPGA performance to accelerate applications involving compute intensive tasks for applications such as Home Automation, IoT and Machine Learning. The basic programming of FPGAs is done with 2 possible languages: Verilog and VHDL. VHDL also requires a knowledge of combinational and sequential electronics, unlike Python, an open source language, recognized for its simplicity and very common among programmers.
Architectures. Heterogeneous architectures
Components. The basic components of programmable subsystems
Methodology. The stages of embedded software development (Python and Linux)
Overlays. The development of associated interfaces, peripherals and drivers
IOPs. Configurable and programmable interfaces
Tools. Development tools and environments (Pynq, Jupyter, PYNQ)
Application cases: development examples: audio interfaces, peripheral interfaces (I2C, UART, Analog, PWM, etc.), Home Automation, IoT, Machine Learning (YOLO, BNN Binary Neural Networks)

Edge Computing High Level Synthesis
EN. This section shows a unified view of hardware and software domains as implementation alternatives based on design exploration and metrics.  The objective of the course is to learn how to develop a complete programmable and configurable system called System-on-Chip (SoC). These systems use high-level languages, such as Python and C/C++. However, some features, such as intensive computing, peripheral drivers, signal processing, or real-time control, require hardware accelerators. These accelerators and their associated programmable interfaces are the result of development steps giving access to reconfigurable electronics, or FPGAs. Accelerators and their associated programmable interfaces are the result of development steps giving access to reconfigurable electronics, or FPGAs. We do not go through combinational and sequential logic to program an FPGA; high-level tools such as SDSoC and HLS (High Level Synthesis) are available. A higher level of programming is performed to achieve a hardware architecture in an FPGA circuit. The FPGA circuit can be a Zybo, Pynq or Zed Board, where advanced applications such as image processing are developed. The system will be considered as a system-on-chip or SoC, in which, the execution of Python applications can be accelerated by reconfigurable hardware accelerators. The course explores the different trends, components and alternatives according to the final objective. The system level design is introduced by first a description of the different components involved, since integrated circuits design and usage up to software, processors and custom hardware processors. It also covers design methodologies, optimization techniques and test environments. The course is complemented by practical exercises and laboratory sessions using state of the art technologies, technologies trends and design challenges.
SoC architecture exploration. Design Analysis and implementation alternatives.
Improving performance. Optimization strategies. Improving Resources.
Interface Synthesis. Hardware/software encapsulation and IO protocols.
Verification and validation steps. Prototyping, scheduling, simulation and emulation.
IP creation. Components creation and utilization.
Coding considerations. 

Prior Experience

Embedded Systems, Microprocessors

Type of Assessment for UE in Q2

  • Presentation and/or works
  • Practical test
  • eTest

Q2 UE Assessment Comments

Edge Computing (28510) UI-M2-IRIGIG-565-M: Total 2nd session (2nd quarter - June): 100%. Practical laboratory work TP 10%; Practical test of laboratory results outside the examination session 10%; Final deliverables for Personal Projects / Works (report, prototype, model, plan, ...) 45%. Final presentation of Projects / Personal work 35%. Additional comments introduced by the teacher: practical test of laboratory results outside the exam session: at least 1 week after the last practical work session, separation of the evaluations according to the grouping or duplication of the practical work according to the purposes; delivery of the results of the practical work and final delivery of the deliverable for the project / personal work (report, prototype, model, plan, etc.): one week before the date of the first exam; final presentation of the Project / Personal work in session/examination period: separation of evaluations according to the groups or duplication of practical work according to specialties; presentations in groups of 2-3 students, maximum 30 'of presentations per group, maximum 6 presentations in groups of 4 hours.

Type of Assessment for UE in Q3

  • Presentation and/or works
  • eTest

Q3 UE Assessment Comments

Edge Computing (28510) UI-M2-IRIGIG-565-M: Total 2nd session 100%: Final deliverables for Projects / Personal Works (report, prototype, model, plan, ...) 60%. Final Presentation of Projects / Personal Works: 40%.  Additional comments : final delivery of Project / Personal work results (report, prototype, model, plan, ...) one week before the date of the first examination; final Presentation of Project/Personal work in examination session/period: separation of the evaluations according to groups or duplication of TPs per specialties, presentations in groups of 2-3 students, maximum 30 'presentations per group, maximum 6 presentations per 4-hour evaluation

Type of Teaching Activity/Activities

AAType of Teaching Activity/Activities
  • Cours magistraux
  • Conférences

Mode of delivery

AAMode of delivery
  • Mixed

Required Reading


Required Learning Resources/Tools

AARequired Learning Resources/Tools
I-SEMI-114EN. Tutorials available on GitHub and Xilinx Vivado Pynq and Vitis

Recommended Reading


Recommended Learning Resources/Tools

AARecommended Learning Resources/Tools
I-SEMI-114Not applicable

Other Recommended Reading

AAOther Recommended Reading
I-SEMI-114Not applicable

Grade Deferrals of AAs from one year to the next

AAGrade Deferrals of AAs from one year to the next
(*) HT : Hours of theory - HTPE : Hours of in-class exercices - HTPS : hours of practical work - HD : HMiscellaneous time - HR : Hours of remedial classes. - Per. (Period), Y=Year, Q1=1st term et Q2=2nd term
Date de génération : 09/07/2021
20, place du Parc, B7000 Mons - Belgique
Tél: +32 (0)65 373111