 | Study programme 2025-2026 | Français | |
| Circuits logiques et numériques | |||
Learning Activity |
| Code | Lecturer(s) | Associate Lecturer(s) | Subsitute Lecturer(s) et other(s) | Establishment |
|---|---|---|---|---|
| I-ULBC-020 |
|
|
| Language of instruction | Language of assessment | HT(*) | HTPE(*) | HTPS(*) | HR(*) | HD(*) | Term |
|---|---|---|---|---|---|---|---|
| Français | Français | 24 | 24 | 0 | 0 | 0 | Q2 |
Content of Learning Activity
1 - Numeral systems
2 - Computer architecture
3 - Microcontroller architecture
4 - Semiconductors
5 - MOSFETs and CMOS digital electronics
6 - Combinatorial logic
7 - Sequential logic
8 - Digital building blocks
9 - Memory
Project on PSoC5LP microcontrollers
Required Learning Resources/Tools
- Slides
- Exercise manual and solutions
Recommended Learning Resources/Tools
Not applicable
Other Recommended Reading
Not applicable
Mode of delivery
- Hybrid
Type of Teaching Activity/Activities
- Cours magistraux
- Travaux pratiques
- Projet sur ordinateur
- Ateliers et projets encadrés au sein de l'établissement
Evaluations
The assessment methods of the Learning Activity (AA) are specified in the course description of the corresponding Educational Component (UE)
Location of learning activity
- Université de Mons - Charleroi
Location of assessment
- Université de Mons - Charleroi
(*) HT : Hours of theory - HTPE : Hours of in-class exercices - HTPS : hours of practical work - HD : HMiscellaneous time - HR : Hours of remedial classes. - Per. (Period), Y=Year, Q1=1st term et Q2=2nd term